1. Field of the Invention
The present invention relates to a phase change memory device and a method of fabricating the same, and more particularly, to a phase change memory device using a chalcogenide metal alloy formed of germanium (Ge), antimony (Sb) and tellurium (Te) as a phase change material, and a method of fabricating the same.
2. Discussion of Related Art
Semiconductor memories may be classified into two kinds, namely, volatile memories and non-volatile memories. The volatile memories lose all data stored therein when power is interrupted, but the non-volatile memories do not lose the stored data even when power is interrupted. Following the recent rapid development of mobile appliances exemplified by personal data assistants (PDAs), the non-volatile memories are widely used in various hand-held terminals. Further, when conventional volatile memories such as a dynamic random access memory (DRAM) or a static random access memory (SRAM) may be replaced with the non-volatile memories, reduction of power consumption and great reduction of operating time may be expected. Among the non-volatile memories, flash memories are the most developed and purchasable memory. Recently, the flash memories including an NOR type and an NAND type have expanded their market based on the technical background described above. However, since the flash memories have disadvantages such as a low operating speed and a use of relatively high voltage, they cannot replace conventionally-used universal memories such as DRAMs or SRAMs right now, and are currently used mainly in mobile appliances such as digital cameras or cellular phones as information storage media thereof.
Meanwhile, one of the principle capabilities that the memory must have is a reliable rewrite operation. Although the flash memory does not have a reliable rewrite operation, under the condition of use only in the mobile appliances including PDAs, rewrite cycles can be greatly reduced. However, a stable operation in a universal PC cannot be guaranteed by the rewrite operation reliability required for the mobile appliances.
Today, to satisfy specifications of memory required for hand-held mobile appliances and digital appliances having convergence functions, a method of properly mixing DRAM, SRAM and flash memory is adopted to apply all advantages that the respective memory modules have. However, this method significantly increases a size of an entire memory chip and production costs. Since there is no memory satisfying all conditions such as high speed, high density and non-volatility at the same time, the method is reluctantly chosen, but cannot be said to be effective.
In addition, with a current trend to miniaturization of a silicon fabrication process, which is developing very fast, it is indicated that there is a theoretical limitation to ensure predetermined operating characteristics by miniaturizing a flash memory device, and high integration of the flash memory is predicted to reach a limit within ten years from now.
For these reasons, researchers and developers have been working in the memory field eagerly expecting the advent of an all-around integrated memory which can be stably mounted on any device for any purpose. The integrated memory must be non-volatile, and have high speed, low power consumption and good rewrite operation reliability. However, until now, no such semiconductor memory having all of these performances has been commercialized. Accordingly, a variety of non-volatile memory technology is being vigorously developed and investigated from all angles in possibility of development and practical use.
Other than the improvement of the operating performances of the flash memory, four candidates of technology for the next generation non-volatile memory device easily replacing the flash memory in an ultrafine silicon device process generation are being actively investigated, which include: (1) Ferroeletric RAM (FeRAM); (2) Magneto-resistive RAM (MRAM); (3) Phase change RAM (PRAM); and (4) Resistive RAM (RRAM). While all of these non-volatile memory technologies have advantages and disadvantages, FeRAM and MRAM have been studied for relatively longer than PRAM and RRAM. The results of researches and developments have consistently indicated that FeRAM and MRAM have technical problems of ineffective fabrication of the device in an aggressive miniaturization process, and difficulty of guaranteeing preferable and reliable operating characteristics. Thus, it has been determined that these non-volatile memory devices cannot replace the flash memory, and thus the technology to be used in a non-volatile memory market for specific uses continues to be developed.
Meanwhile, one non-volatile memory, a phase change RAM (PRAM), stores data by selecting a method of applying current or voltage under proper conditions to control a crystalline state of a material, and reads out the kind of the stored data based on resistance change according to the crystalline state of the material, using a phase change material having a variable resistance according to the crystalline state of the material. Here, the material has a low resistance characteristic in a crystalline state, but a high resistance characteristic in an amorphous state. In the phase change memory device, conversion from the high-resistance amorphous state to the low-resistance crystalline state is referred to as a set operation, and conversion from the low-resistance crystalline state to the high-resistance amorphous state is referred to as a reset operation.
Meanwhile, in the fabrication of the phase change memory device, the same degree of integration as that of DRAM may be easily realized, since a phase change material formed of a chalcogenide metal alloy which has been typically used in an optical storage information device such as CD-RW or DVD may be used, and a fabrication process for the phase change memory device is consistent with a conventional fabrication process for a silicon-based device. On the other hand, the MRAM and FeRAM compared with the phase change memory experience a drastic increase in difficulty of the process due to the miniaturization of the device, or performance degradation of the device itself. In view of the development of the technology so far, the phase change memory can be the most prominent candidate for the next generation non-volatile memory to replace the current flash memory, and thus is the semiconductor memory technology that is receiving growing attention.
However, to commercialize the phase change memory, there are two technical issues which must be addressed.
The first technical issue is great reduction of power consumption required to drive the memory device. The phase change memory device is driven by controlling the crystalline state of the phase change material using electrical Joule-heat generated when current is applied to a resistor as described above, and thus can consume a relatively large amount of power. In addition, this problem is associated with why the phase change memory device has not received much attention until now even though it has relatively favorable advantages than other types of non-volatile memories. That is, a design rule used in a semiconductor process is scaled down by a specific scaling method, and thus, when the phase change memory device is fabricated by a conventional semiconductor process fabricating a relatively large-scaled device, it is impossible to realize a memory device having practical operating characteristics due to generation of power and heat which are unequal to an entire system. However, as a size of the device itself decreases together with a continuous downscale of the design rule, the power consumption required to operate the phase change memory device can be greatly reduced by the current design rule of the typical semiconductor process.
Meanwhile, an effort to reduce a current size for the operation of the phase change memory device is progressing, and various methods of reducing an absolute current required for the operation of the phase change memory device are being studied. More particularly, a method of changing a kind of the phase change material, or a method of changing a structure of the phase change memory device may be used.
The second technical issue is that there is a need of improving operating reliability of the phase change memory device. In regard to the operating reliability of the phase change memory device, there are three operating conditions.
The first operating condition that should be considered in regard to the operating reliability of the phase change memory device is that no data stored in an adjacent memory device be damaged or changed due to heat generated during the memory operation in a specific device. Particularly, a gap between devices in a memory array which is highly integrated is highly likely to be reduced continuously in the future, and in some cases the heat generated during the memory operation of the specific cell serves as a noise factor, which may inhibit the memory operation of an adjacent cell. This phenomenon is generally referred to as cross-talk in a memory array operation. In the phase change memory device, the reduction of the operating current, the first technical issue described above, becomes a very important factor in preventing the cross-talk and implementing the stable memory array operation. That is, a low power consuming operation is necessary to inhibit an increase in temperature of the memory cell during the operation of the memory device. Thus, to guarantee reliable memory operation in the phase change memory with a high degree of integration, the structural development of a low power consuming device is essential.
The second operating condition that should be considered in regard to the operation reliability of the phase change memory device is that data stored in the device must be retained even with the passage of time. That is, a set or reset data value, which is written to the phase change memory device, must be retained for a long time, and particularly at a high temperature at which a chip having a memory array is actually operated. Regarding the characteristics of the non-volatile memory, these requirements are mainly associated with a data retention characteristic. In addition, since the phase change memory device uses changes of the crystalline state of the material due to heat energy and electrical resistance of the material that the phase change material experiences, it is very important to extend retention time of the phase change memory device by improving the kind of the material and the structure of the device.
The third operating condition that should be considered in regard to the operating reliability of the phase change memory device is that data must be stored stably during repetitive write operations of the phase change memory device. In other words, it is essential to ensure a rewrite characteristic for erasing data written in advance and rewriting new data by repeating set and reset operations in the phase change memory device. It is reported that the number of rechargeable cycles of the phase change memory device is about 108, which is the most favorable data obtained using a test device fabricated under the optimized conditions. And thus, considering a characteristic deviation of a unit memory device constituting an actual memory array, it is estimated that the number of rechargeable cycles of the phase change memory device is about 105 to 107. This data is a little bit higher than the flash memory, but still not enough to replace the flash memory with the phase change memory device and open up new markets in an embedded memory field, and a next generation integrated non-volatile memory field which will replace SRAM or DRAM in the future. Thus, it is expected that the improvement of the rewrite characteristic of the phase change memory device will become a necessary and sufficient condition for the phase change memory to enter into applications other than the flash memory.
Meanwhile, it is known that the rewrite characteristic of the phase change memory device is limited by some mechanism that destroys the operation of the device. The first operation breakdown mechanism inhibiting the rewrite operation in the phase change memory device is a reset operation incapability (set-stuck) mechanism. The set-stuck mechanism is a mechanism in which a resistance of the device is fixed to a low-resistance set state and unable to be switched into a reset operation while the phase change memory device repeats a set operation and a reset operation and rewrites data. This is because a composition in the phase change material layer constituting the phase change memory device is greatly changed compared with an initial composition thereof due to repeated current application and heating experienced by the memory device, and phase transition of the material, so that a conductive current path perpendicularly passes through the phase change material layer, or due to these causes, the phase change material and elements forming upper and lower electrodes diffuse into each other, so that a conductive current path is formed in the memory device. The second operation breakdown mechanism inhibiting the rewrite operation in the phase change memory device is a set operation incapability (reset-stuck) mechanism. The reset-stuck is a mechanism in which the resistance of the device is fixed to the reset resistance or a higher resistance than the reset resistance and unable to be switched into the set operation. As described above, this is because the composition of the phase change memory device is greatly changed due to repeated current application and heating experienced by the memory device, and the phase transition of the material, so that an amorphous material formed during the reset operation forms a third phase that is not changed into the set state any more, or due to the above causes, the phase change material and the upper and lower electrodes are mechanically separated, so that they cannot be electrically connected with one another anymore. Particularly, this mechanism is caused by a volume change of the phase change material unavoidably experienced during the phase transition. The third operation breakdown mechanism inhibiting the rewrite operation of the phase change memory device is an operating current drift mechanism. The operating current drift phenomenon is a mechanism in which the current required for the reset operation and the current required for the set operation are greatly changed compared with the initial current after the phase change memory device has repeatedly performed the set and reset operations a predetermined number of times. That is, the set and reset operations themselves can be performed, but operating conditions are variable. This is because the electrode constituting the phase change memory device is not optimized, so that an unwanted third thin film is formed between the phase change materials, or the electrode is greatly degraded during the rewrite operation accompanied with heating. The fourth operation breakdown mechanism inhibiting the rewrite operation in the phase change memory device is an operating speed degradation phenomenon. The operating speed degradation phenomenon is that time required for the write operation becomes delayed as the memory operation of the phase change memory device is repeated. This phenomenon is typically observed when the phase change memory device writes set-state data in the reset state, which is because the set operation occurs with crystallization of the phase change material. This is because the crystalline state or composition of the phase change material forming an operating region of the device is greatly changed by some reasons during the operation of the phase change memory device, so that a reversible phase change phenomenon is not properly expressed in the write operation.
Among the operation breakdown mechanisms inhibiting the rewrite operation of the phase change memory device described above, the phenomena associated with the phenomena of operating current drift and operating speed degradation are closely related to operating stability of a single memory device and an operating yield of an entire memory array formed of a plurality of memory cells. That is, in order to write certain data to a write unit with predetermined capacity including a memory cell where the phenomena of operating current drift and operating speed degradation occur, a margin between the set and reset conditions is increased to provide normal data to at least some memory cells where the degradation has been already started, so that there is no choice but to sacrifice operating performance of the entire memory array. In other words, to increase the operating yield of the phase change memory array, it is necessary to find an appropriate method of preventing the occurrence of operating current drift and operating speed degradation.
Thus, to improve high temperature operating stability and rewrite operating characteristic of the phase change memory device and ensure the operating reliability of the device to the rewrite operating characteristic, it is urgent to develop a novel phase change material, which can avoid the four operation breakdown mechanisms, i.e., the set-stuck, the reset-stuck, the operating current drift, and operating speed degradation. However, research for improving the operating reliability of the phase change memory device has not been forthcoming, compared with those for reducing current required for the device operation, another technical issue in the phase change memory device as described above, and causes of these operation breakdown mechanisms have still not been clearly assessed.
Meanwhile, as the phase change material to form the phase change memory device, a chalcogenide metal alloy having germanium (Ge)-antimony (Sb)-tellurium (Te) in a certain composition, particularly, Ge2Sb2Te5 (GST) having a composition of 2:2:5 has been mainly employed. Since GST has been widely used as a core material of an optical information storage medium using a phase change phenomenon due to laser light as described above, much has been discovered about physical properties of the material. Especially, GST is reversible in transition between an amorphous state and a crystalline state, has a very fast crystallization speed and good continuity in the phase transition. These are still considered significant advantages in application to the phase change memory device. Thus, GST is considered to be easily applied to the phase change memory device, and thus is actually employed to most phase change memory devices fabricated by manufactures.
However, successive reports on a demand for improved phase change memory devices using GST are produced since the device has some problems in the operational reliability thereof. For example, a study has disclosed that Te and Sb diffuse during a heat-generated operation, so that the phase change memory device including GST has greatly different composition from the initial one. Further, after several memory devices are inspected among the phase change memory devices including GST with the initial composition, some research shows that reset current drift and degradation in set operating speed are observed in some devices, which is because a part of an operating region of the phase change memory device has a second phase formed of Ge—Te, and that Ge segregation and a change into an oxide layer may occur even after only several cycles of the operation. In addition, other research shows that after the set-stuck occurs in the phase change memory device including GST, a composition of the device operating region of the corresponding device is very different from the initial composition, and in particular, the composition is changed into an Sb-rich composition. Meanwhile, the phase change material has been usually developed so far as a storage medium for an optical information storage apparatus, so that the material does not need to have tolerance to the rewrite operation for 108 or more cycles like semiconductor memory, and strictly control distributions of electrical resistances of the amorphous and crystalline phase change materials. However, to guarantee stable operating reliability to the rewrite operation of the phase change memory device, there is a need to develop the phase change material with a stable composition in which the phase separation does not occur easily.
Based on the results described above, characteristics of the phase change material required to improve the operating stability and reliability of the phase change memory device are as follows:
First, the phase change material may have a single crystalline phase to improve set operation stability in the phase change memory device. GST including Ge—Sb—Te in a composition of 2:2:5 which are typically used to realize the current phase change memory device has two crystalline states of a metastable face-centered-cubic (fcc) structure and a hexagonal-closed-packing (hcp) structure according to the difference in crystallization temperature. Further, an fcc resistance is generally higher than an hcp resistance. When GST is applied to realize the optical information storage medium, since a difference of a refractive index between the crystalline phase and the amorphous phase in GST is changed by application of laser light, the difference of resistance between the fcc structure and the hcp structure has little effect on data storage and regeneration, and good material characteristics may be guaranteed to realize the optical information storage medium using fast crystallization speed and phase continuity expected due to the presence of the fcc structure. However, in the phase change memory device that uses electrical resistances in the crystalline and amorphous states to read data, the two structures in the crystalline state may not avoid the possibilities of wide distribution of set resistances during a set operation, and variable operating conditions required for a reset operation to be performed later. For this reason, to improve the set operation stability in the phase change memory device, it is preferable to make a novel composition of the phase change material having a single crystalline phase in a crystallization step according to application of heat energy.
Second, to improve reset operation stability in the phase change memory device, a reset resistance may be stably maintained for a long time at a relatively high temperature around the crystallization temperature of the phase change material. The phase change memory device set in the reset state by applying predetermined operating conditions experiences a high temperature environment during the operation. Firstly, a circumstance in which an operating temperature of a memory chip including a phase change memory array formed of a plurality memory cells typically increases in a range from 85 to 120° C. should be considered. As a result, within the above temperature condition, the memory device memorizing the reset data must not be changed into a third state having a lower resistance than a typical reset resistance after a predetermined time under the influence of the operating temperature. Secondly, considering an operating environment of the phase change memory array formed of a plurality of the memory cells, heat energy applied for the writing operation in a corresponding cell gives an effect on an adjacent cell. After predetermined cycles of the operation, the adjacent cell must not be changed into the third state having a lower resistance than the initial reset resistance. If the first and second circumstances actually occur in the phase change memory device, and after a predetermined time or predetermined cycles of the operation, a specific memory device is changed into the third state, in which a resistance is lower than the typical reset resistance or higher than the typical set resistance, the device may not stably perform reset and set operations under the predetermined operating conditions in the write operation. This may be a direct cause of inhibition of practical use of the phase change memory device in terms of operational margin and yield of the memory device and a fundamental cause of the operation breakdown mechanism in the phase change memory described above in some cases.
The operating characteristics required to realize the phase change memory device also include reduction of operating current and an increase in operating speed, in addition to the operational stability and reliability, and thus it is preferable that a phase change material with a novel composition for improving the stability and reliability of the phase change memory device does not greatly inhibit the operating current and speed characteristics.
As a result, when a phase change memory device is formed of a phase change material with a novel composition which has a single crystalline phase in a set state and retain a reset resistance at a high temperature for a long time, the phase change memory device may have more stable and better operating characteristics.